Design Linked Incentive Scheme: How India Is Building a Fabless Semiconductor Powerhouse

Design-Led Self-Reliance: How India Is Building a Fabless Semiconductor Ecosystem

As semiconductors become foundational to healthcare, transport, communications, defence, space, and digital infrastructure , India is accelerating efforts to secure its position in the global chip value chain. With supply chains heavily concentrated in a few geographies and exposed to disruptions, India’s strategy focuses on design capability, ecosystem creation, and policy-driven self-reliance .

Why Fabless Chip Design Matters

Fabless semiconductor design occupies the most strategic layer of the electronics value chain. While fabrication and assembly add scale, over 50% of a chip’s value lies in design and intellectual property (IP) . Indigenous design capability enables control over core technologies, reduces import dependence, attracts fabrication investments, and ensures long-term technological leadership. Without domestic chip design, electronics manufacturing remains dependent on foreign IP and critical components.

Design Linked Incentive (DLI) Scheme

The Design Linked Incentive (DLI) Scheme , implemented by Ministry of Electronics and Information Technology under the Semicon India Programme, is central to building India’s fabless ecosystem. It supports startups, MSMEs, and domestic companies across the full semiconductor design lifecycle—ICs, chipsets, SoCs, systems, and IP cores. The scheme offers reimbursement of up to 50% of eligible design expenditure (capped at ?15 crore) and deployment-linked incentives of 6%–4% of net sales for five years , subject to thresholds.

Design Infrastructure and Ecosystem Enablement

A major strength of the DLI framework is shared national infrastructure. The ChipIN Centre , set up by C-DAC , provides access to advanced EDA tools, IP repositories, MPW prototyping, and post-silicon validation. Since December 2021, nearly one lakh engineers and students across 400 organisations have accessed these facilities, with over 54 lakh hours of EDA usage , significantly lowering entry barriers.

From Design to Silicon

S o far, 24 chip design projects have been sanctioned under DLI, resulting in 16 tape-outs, six fabricated chips, ten patents, and over 140 reusable IP cores , along with training of 1,000+ specialised engineers . Indian startups such as InCore Semiconductors and Netrasemi highlight India’s transition toward design-led semiconductor self-reliance and growing global competitiveness.

Important Facts for Exams ??

• DLI Scheme operates under the Semicon India Programme

• Design contributes over 50% of semiconductor value

• ChipIN Centre provides shared EDA and prototyping support

• Semicon India Programme outlay: ?76,000 crore